Through Silicon Via
Through Silicon Via (TSV) is an enabling technology that allows electrical connections to be formed through a silicon wafer or multi-wafer devices. Electrical connections through a silicon wafer allow for reduced die footprints and interlayer connectivity. When combined with Wafer Level Packaging (WLP), TSVs minimize die size, allow conventional or flip-chip bonding, and help minimize cost of the final macroscale device.
Micralyne offers polysilicon TSV technology for custom prototyping and manufacturing. Connections between layers are created through etching via holes, selectively insulating, and filling with conductive polysilicon. This platform includes deep etched silicon trenches, isolation or grounding vias, polysilicon filling, and the option for integration in SOI wafer stacks. We would be pleased to discuss your MEMS TSV requirements, including aspect ratio, thickness, pitch, resistivity, capacitance, geometry, and isolation resistance.
Contact us for more information about our Through Silicon Via (TSV) process.